1:9 low-skew clock distribution at 133.3 MHz
The CY2309NZSC-1HT is a single-input, nine-output clock driver that fans out a single clock source to nine destinations with minimal skew between outputs. The part is non-differential on both input and output sides, accepting and delivering single-ended clock signals. Maximum operating frequency is 133.3 MHz, making it suitable for distributing reference clocks to FPGAs, ASICs, or memory controllers in a 3.3 V logic environment. The 1:9 fanout ratio lets a single oscillator drive multiple clock domains without loading the source.
Supply and package — 3.3 V commercial-grade SOIC
Packaged in a 16-pin SOIC (3.90 mm body width), surface-mount. The supplier device package is 16-SOIC, a standard footprint shared with many logic and clock distribution ICs. No differential signalling support means the layout is simpler than for LVDS or HCSL fanout buffers.