NoBL synchronous SRAM at 166 MHz — 512K x 18 for cache and buffer duty
The CY7C1356C-166AXI is a 9 Mbit synchronous SRAM from Infineon's NoBL (No Bus Latency) series, organized as 512K words by 18 bits. It clocks at 166 MHz with a 3.5 ns access time, meaning the controller sees data valid within that window from the read command — a timing spec that drives the bus margin in a high-throughput pipeline.
Package and rework — 100-TQFP with a 14x20 mm body
Housed in a 100-lead LQFP (supplier package 100-TQFP, 14x20 mm), the part is a standard fine-pitch QFP with 0.5 mm lead pitch. The leads are gull-wing, so visual inspection and touch-up with a hot-air station is straightforward; the part survives a rework cycle if the profile stays under 260°C peak per J-STD-020. Pin 1 is marked with a chamfer on the mould body and a dot on the top surface — no ambiguity under a microscope. The tray packaging means the parts arrive in antistatic trays, not tape-and-reel, so hand-assembly or small-batch reflow is the normal flow.
For EU/UKCA market shipments, this means no compliance gap to manage. The base product number CY7C1356 covers both the C revision (this one) and earlier A/B steppings; the -166AXI suffix locks the speed grade, package, and temperature range. If a BOM calls for the commercial-temperature sibling CY7C1356C-250AXC, the I suffix here is the wider-temperature version — same footprint, same pinout, just a different operating range.
Sourcing and availability — quoted to order
This part is sourced through authorized and independent distribution channels.