256K x 18 synchronous SRAM at 100 MHz
The CY7C1353G-100AXC is a 4.5 Mbit synchronous SRAM organized as 256K words of 18 bits each, clocked at 100 MHz with an 8 ns access time from the clock edge. It belongs to the NoBL (No Bus Latency) series, which eliminates the dead cycle between read and write operations — the bus turns around on consecutive clock edges without an idle cycle. The part operates from a single 3.3 V supply (3.135 V to 3.465 V) and uses a parallel interface, making it a direct fit for legacy or cost-optimized synchronous SRAM sockets in networking, telecom, and industrial control.
Package and temperature grade
Housed in a 100-lead LQFP (also specified as 100-TQFP, 14x20 mm body), the CY7C1353G-100AXC is a surface-mount part supplied in tray packaging. The commercial temperature range (0°C to 70°C) suits controlled indoor environments — telecom central offices, data-center line cards, and test equipment — but not extended or automotive ambient.
Active lifecycle and compliance
The device is ROHS3 compliant, meeting the current EU restriction-of-hazardous-substances directive without exemptions.