155.52 MHz PLL clock driver in a 20-pin DIP
The AD805BN is a single-circuit PLL clock driver from Analog Devices' 805 series, designed to generate or clean up a clock at frequencies up to 155.52 MHz. It accepts a single-ended input and delivers a single-ended output with a 1:1 ratio — no differential signalling, no fanout. The part runs from a 4.5 V to 5.5 V supply, so it lives on a 5 V rail, not a 3.3 V one. Packaged in a 20-pin DIP (0.300" body) with through-hole leads, it's suited for prototyping, socketed boards, or legacy telecom and datacom equipment where surface-mount isn't an option.
Supply and logic compatibility
The 4.5 V to 5.5 V supply range means the AD805BN is a 5 V part. If your system clock tree is 3.3 V, you need a level translator or a different PLL. The input and output are single-ended and non-differential, so it mates directly with TTL or 5 V CMOS logic families without extra termination.
Through-hole 20-DIP (0.300" width, 7.62 mm row spacing) — the same footprint as a standard narrow DIP. No moisture sensitivity level to track; store the tubes or bulk loose parts on the shelf without a dry-bag clock. Hand-solder or socket it; rework is straightforward.
It is RoHS non-compliant (lead-bearing), so verify your assembly's exemption or waiver if you're shipping into RoHS-regulated markets.