Clock generator with integrated PLL and 1:12 fanout
The AD9517-3ABCPZ from Analog Devices packs a phase-locked loop (PLL) and a 1:12 fanout distribution buffer into a single package. It accepts CMOS, LVDS, or LVPECL reference inputs and delivers the same three output logic families across twelve channels, with a maximum output frequency of 2.25 GHz. The on-chip VCO covers a 2.0 GHz range, eliminating an external VCXO in many designs. Typical applications include wireless base-station clock trees, automated test equipment (ATE), and high-speed ADC/DAC clocking where multiple synchronized clock domains are required.
Operates from a single 3.135 V to 3.465 V supply and is specified over the industrial temperature range of -40°C to 85°C. That covers outdoor telecom cabinets, base-station shelters, and factory-floor ATE racks without forced cooling. The exposed-pad package aids thermal transfer to the PCB ground plane.
Marked as Active in production and ROHS3 compliant.