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Renesas Electronics QS5813PV — Discrete Semiconductors
Renesas Electronics

QS5813PV Clock Driver, PLL, 1:13, 48-DIP, -40 to 85°C

MPNQS5813PV
End of Life

QS5813PV, Clock Driver, PLL Yes, Output Clock, 1:13 Input:Output, 3.135V~3.465V Supply, 48-DIP (0.600", 15.24mm), Through Hole, -40°C~85°C, Active.

$6.32Ref. price · indicative, final on quote
QS5813PV datasheet
Packaging48-DIP (0.600", 15.24mm)
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

QS5813PV Technical Specifications
ParameterValue
Mounting typeThrough Hole
Voltage3.135V ~ 3.465V
Operating temperature-40°C ~ 85°C (TA)
PLLYes
OutputClock
PackageBulk
Main purposeSDRAM DIMM
Case48-DIP (0.600\", 15.24mm)
Number of circuits1
Ratio - Input:Output1:13
Differential - Input:OutputNo/No

Product details

1:13 fanout and what it means for your memory bus

A 1:13 input-to-output ratio means this single driver can feed up to 13 SDRAM devices or DIMM slots directly, without external clock buffers. The PLL keeps all outputs phase-locked to the input reference, which is critical for maintaining setup-and-hold margins across a multi-load memory bus. The differential input and output are both single-ended (No/No), so you're driving standard CMOS-level clock lines — no LVDS or HSTL translation needed on the board.

Lifecycle and sourcing

It is RoHS non-compliant per the listing. For legacy or exempt builds where leaded solder is accepted, it remains available through independent distribution.

Frequently asked questions

What is QS5813PV used for?

It is a clock driver with integrated PLL, intended for SDRAM DIMM clock distribution. It takes one input and delivers 13 phase-aligned clock outputs to multiple memory loads.

What is the output type of QS5813PV?

The output is Clock, single-ended (not differential). Both input and output are single-ended, so it drives standard CMOS-level clock lines.