PLL-based clock synthesis and jitter attenuation
The 8V19N492NLGI is a PLL-based clock synthesizer and jitter attenuator from the FemtoClock® NG family, designed to generate low-jitter output clocks from a reference input. It accepts LVCMOS, LVDS, or LVPECL inputs and produces up to 16 differential LVDS or LVPECL outputs, with a maximum output frequency of 2.949 GHz. The 2:16 input-to-output ratio means a single reference clock can be fanned out to multiple high-speed serial links, such as 10GbE, Fibre Channel, or PCIe, while the PLL cleans up jitter from the source.
Package, supply, and temperature grade
Housed in an 88-lead VFQFPN with exposed pad (10x10 mm), the device requires a solid thermal connection to the PCB ground plane to dissipate heat.