Renesas 74FCT574CTQG, D-Type flip-flop, 8-bit, positive-edge triggered, tri-state non-inverted outputs, 4.5V to 5.5V supply, 5.2 ns max propagation delay at 5V/50pF, -40 to 85°C, 20-QSOP package.
| Parameter / Attribute | Specification / Value |
|---|---|
| Type | D-Type |
| Series | 74FCT |
| Output type | Tri-State, Non-Inverted |
| Trigger type | Positive Edge |
| Mounting | Surface Mount |
| Supply voltage | 4.5V ~ 5.5V |
| Current - quiescent | 1 mA |
| Current - output high, low | 15mA, 48mA |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Bulk |
| Function | Standard |
| Case | 20-SSOP (0.154\", 3.90mm Width) |
| Input capacitance | 6 pF |
| Number of elements | 1 |
| Number of bits per element | 8 |
| Max propagation delay @ v, max CL | 5.2ns @ 5V, 50pF |
Sibling variants, package options, and speed/density grades in this Renesas Electronics semiconductor series. Active Shenzhen warehouse allocation and rapid 24-48h dispatch.
The 6 pF input capacitance is low enough that the clock line sees minimal loading even with eight bits switching simultaneously.
The quiescent current of 1 mA is negligible for a powered-up board; the real power draw is the switching current into the 50 pF load at the clock rate.
On each positive clock edge, it captures the data at its eight inputs and presents it at the outputs. The tri-state control lets the outputs be placed in a high-impedance state for bus sharing.