Lattice Semiconductor OR2C04A4M84-D — FPGA / CPLD & Programmable Logic
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Lattice Semiconductor / FPGA / CPLD & Programmable Logic

OR2C04A4M84-D Lattice ORCA2 FPGA, 160 I/O, 11K gates

MPN OR2C04A4M84-D
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Lattice Semiconductor ORCA™2 series FPGA, OR2C04A4M84-D, 11 000 gates, 400 logic cells, 160 I/O, 6400 bits RAM, 3 V supply, 0°C to 70°C, Bulk.

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[SPEC] Essential Parameters Snapshot Full Specifications (10)
Supply Voltage 3.0

Full Technical Specifications

10 Parameters
OR2C04A4M84-D specifications
Parameter / AttributeSpecification / Value
SeriesORCA™2
MountingSurface Mount
Operating temperature high0°C to 70°C (TJ)
Package_typeBulk
Number of i (O)160
Total ram bits6400
StatusActive
Number of gates11000
Supply voltage3.0
Number of logic elements (Cells)400
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Technical Details & Description

Logic density and I/O for glue-logic integration

The OR2C04A4M84-D: With 11 000 gates and 400 logic cells, this device sits at the lower end of the ORCA2 family — sized for bus bridging, state-machine control, and simple peripheral expansion where a full gate array would be overkill. The 160 user I/O pins give it the headroom to absorb multiple 8- or 16-bit buses and still leave pins for control signals. The 6400 bits of on-chip RAM handle small FIFOs or register files without an external SRAM.

Temperature grade and package handling

This covers most indoor equipment, telecom central-office, and test-and-measurement enclosures, but not extended industrial or automotive ambient ranges. Supplied in Bulk (tube or tray) — not tape-and-reel. For a prototype run or low-volume production this is convenient; for high-volume pick-and-place, confirm the feeder compatibility or request a reeled variant if one exists in the family.

Frequently asked questions

Is OR2C04A4M84-D a direct drop-in replacement for LCMXO2-640HC-4MG132C?

No — the LCMXO2-640HC-4MG132C belongs to the MachXO2 family with a different architecture, supply voltage (2.375 V), and I/O count (79). The ORCA2 and MachXO2 are not pin-compatible; a board redesign would be required to swap between them.

What does the 11 000 gate count mean for my design?

The 11 000 gates (equivalent to 400 logic cells) limit the design to small glue-logic functions — address decoding, simple state machines, bus transceivers, or control logic for a handful of peripherals. It will not fit a soft-core processor or a complex DSP datapath.

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