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Lattice Semiconductor OR3L165B7PS208-DB — FPGA / CPLD & Programmable Logic

Lattice OR3L165B7PS208-DB FPGA, 516 I/O, 134K RAM

MPNOR3L165B7PS208-DB
Active

Lattice Semiconductor ORCA OR3LxxxB series FPGA, OR3L165B7PS208-DB, 516 I/O, 134144 RAM bits, 244000 gates, 8192 logic cells, 2.375V supply, 0°C to 70°C, Surface Mount, Bulk.

$154.66Ref. price · indicative, final on quote
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

OR3L165B7PS208-DB specifications
ParameterValue
SeriesORCA™ OR3LxxxB
MountingSurface Mount
Operating temperature high0°C to 70°C(TA)
Package_typeBulk
Number of i (O)516
Total ram bits134144
StatusActive
Number of gates244000
Supply voltage2.375
Number of logic elements (Cells)8192

Product details

The OR3L165B7PS208-DB is an FPGA from Lattice Semiconductor's ORCA OR3LxxxB series, built around 8192 logic elements and 244000 gates with 134144 total RAM bits. With 516 I/O in a Surface Mount package, this part targets medium-density glue logic and control-path integration where the I/O count drives the board-level fan-out, not the logic depth. Operating from 2.375 V supply over 0°C to 70°C (TA), it is a commercial-temperature device — suited for indoor equipment, telecom cabinets, and bench-level instrumentation where the ambient stays within that band.

Memory and logic density

The 134144 bits of on-chip RAM serve as distributed block memory for FIFOs, small lookup tables, or register files — enough to buffer a 128×1024-bit frame without external SRAM. Rated at 244000 gates and 8192 logic elements, the device fits state machines, bus interfaces, and moderate DSP pipelines where the critical path stays under the timing closure ceiling of the ORCA fabric.

Frequently asked questions

What is the closest functional second-source for OR3L165B7PS208-DB?

The LCMXO3LF-6900C-6BG324C from the MachXO3 family offers 6864 logic elements and 245760 RAM bits, but with 279 I/O versus 516 on the OR3L165B7PS208-DB — the I/O gap is the deciding factor for board-level fit, not logic density.