Intel EPM1270GT144C3N — FPGA / CPLD & Programmable Logic
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Intel / FPGA / CPLD & Programmable Logic

Intel EPM1270GT144C3N MAX II CPLD, 980 Macrocells, 6.2 ns

MPN EPM1270GT144C3N
Active Spot Stock · 24-48h Dispatch 100% Original Sealed

Intel MAX II CPLD, EPM1270GT144C3N, 980 macrocells, 1270 logic elements, 116 I/O, 6.2 ns tpd, 1.71 V to 1.89 V core, 0°C to 85°C, 144-LQFP, tray.

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Full Technical Specifications

11 Parameters
EPM1270GT144C3N specifications
Parameter / AttributeSpecification / Value
SeriesMAX® II
MountingSurface Mount
Programmable typeIn System Programmable
Voltage supply - internal1.71V ~ 1.89V
Operating temperature0°C~85°C(TJ)
PackageTray
Number of i (O)116
Case144-LQFP
Number of macrocells980
Delay time tpd(1) max6.2 ns
Number of logic elements (Blocks)1270
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[02] Industrial Packaging Tape & Reel / Tray / Tube

Standard factory-sealed packaging compliant with EIA-481 standards for automated high-speed SMT pick-and-place lines.

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Technical Details & Description

Sourcing and lifecycle — what the record shows

The lifecycle record shows an end-of-life hot status and an Active status. We source and quote this to order against an RFQ.

The 144-LQFP package has a 20×20 mm body. The 0°C to 85°C junction temperature range covers commercial and most industrial indoor environments.

Frequently asked questions

What is the exact package of EPM1270GT144C3N?

The EPM1270GT144C3N comes in a 144-LQFP package, also specified as a 144-TQFP with a 20×20 mm body. It is a surface-mount package with 116 usable I/O pins.

What is the difference between EPM1270GT144C3N and EPM1270GT144C4N?

The C3N and C4N suffixes typically indicate different speed grades within the same MAX II density. The C3N carries a 6.2 ns tpd; the C4N would be a slower speed grade. Verify the exact tpd for the C4N from its datasheet before substituting.

Can EPM1270GT144C3N be used as a replacement for EPM1270GT144C4N?

Yes, if the design's timing closure can tolerate the C3N's 6.2 ns tpd — the C4N is a slower grade, so the C3N is a drop-in replacement with faster timing. The pinout, package, and logic density are identical.

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