EPM570T100C5N

Intel

Altera MAX® II CPLD, EPM570T100C5N, 570 logic elements, 440 macrocells, 5.4 ns pin-to-pin delay, 76 I/O, 100-TQFP (14x14 mm), 2.5V/3.3V supply, 0°C to 85°C, in-system programmable.

Intel EPM570T100C5N
[IN STOCK] In Stock: 119 pcs
$26.28/ pc

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Technical specifications

EPM570T100C5N specifications
Parameter / AttributeSpecification / Value
SeriesMAX® II
MountingSurface Mount
Programmable typeIn System Programmable
Voltage supply - internal2.5V, 3.3V
Operating temperature0°C~85°C(TJ)
PackageTray
Number of i (O)76
Case100-TQFP
Number of macrocells440
Delay time tpd(1) max5.4 ns
Number of logic elements (Blocks)570

Technical details

With 440 macrocells and 570 logic elements, this part sits above the 128-macrocell MAX 7000 peers (EPM7128BFC256-7, EPM7128ALC84-6, EPM7128BUC169-4) while staying in a 100-pin TQFP. The 5.4 ns tpd gives a tighter timing budget than the 7.5 ns of the EPM7128BFC256-7, which matters when the CPLD sits between a fast processor bus and multiple peripherals. If your design needs more than 76 I/O or a wider logic fabric, the same MAX II family offers higher-density packages; if you need less, the 128-macrocell parts save board area.

Programming and design flow

The device is in-system programmable via the JTAG interface, supported by Altera's Quartus II software. The MAX II family uses a flash-based configuration that retains the logic image on power-up without an external configuration memory. For a board rework or repair technician, the 100-TQFP (14x14 mm) is a standard fine-pitch package that reflows with typical lead-free profiles; store the reels in a dry cabinet per the moisture-sensitivity label.

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