EPLD in a 40-pin DIP — PAL-type logic for 5 V boards
The EP900PC-2: One-time-programmable EPLD in a 40-pin PDIP, PAL-type architecture with 24 macrocells. Operates from 4.75 V to 5.25 V supply, 45 ns max propagation delay, 24 I/O lines.
OTP architecture — program once, no field updates
The EP900PC-2 is a one-time-programmable EPLD. Once programmed, the logic is fixed — no in-system reconfiguration, no firmware updates via JTAG. This suits production builds where the logic is finalised and verified, but it means every design change costs a new device and a re-burn. For prototyping or iterative development, a UV-erasable windowed package variant would be needed, but this bulk PDIP is OTP only.
Through-hole DIP — rework and socket fit
40-pin PDIP (0.600" row spacing) through-hole package. Sits in a DIP socket or solders into plated through-holes.
Temperature grade — indoor use only
Not suitable for outdoor or unheated industrial enclosures.