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Intel 10M40DCF672I6G — FPGA / CPLD & Programmable Logic

Intel MAX 10 10M40DCF672I6G FPGA, 40000 LEs, 500 I/O

MPN10M40DCF672I6G
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Intel MAX 10 10M40DCF672I6G, Series MAX® 10, FPGA, 40000 Logic Elements/Cells, 2500 LABs/CLBs, 1290240 Total RAM Bits, 500 I/O, 1.15V~1.25V Supply, -40°C~100°C, 672-BGA, Surface Mount, Tray.

$23.9400Ref. price · indicative, final on quote
Intel 10M40DCF672I6G datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

10M40DCF672I6G specifications
ParameterValue
SeriesMAX® 10
MountingSurface Mount
Supply voltage1.15V ~ 1.25V
Operating temperature-40°C ~ 100°C (TJ)
PackageTray
Number of i (O)500
Case672-BGA
Total RAM bits1290240
Number of LABs (CLBs)2500
Number of logic elements (Cells)40000

Product details

No last-time-buy notice, no end-of-life window to schedule around. The MAX 10 family has broad Intel support and a mature Quartus toolchain — erratum are published, and the silicon revision is settled.

Sourcing and BOM-fit summary

The 10M40DCF672I6G is the high-I/O variant of the 40k-LE MAX 10 tier — if your board layout has the 27x27 mm BGA area and you need the full 500 I/O, this is the correct order code. For a smaller footprint with the same logic density, the 484-ball parts are pin-compatible alternatives, but they drop to 360 I/O.

Frequently asked questions

Can 10M40DCF672I6G replace 10M40DCF672I7G?

The 10M40DCF672I6G and 10M40DCF672I7G share the same 672-BGA footprint, logic density, and I/O count. The I6G suffix indicates the -6 speed grade (faster); the I7G is the -7 speed grade. Check your timing closure — if the design met timing on the -7, the -6 is a drop-in replacement with margin to spare.

What is the pinout for 10M40DCF672I6G?

Pin assignments are documented in the MAX 10 device pin-out files available from Intel. The 672-FBGA ball map is common across all MAX 10 40k-LE devices in that package — the I/O assignment varies by your Quartus project pin planner.

Can 10M40DCF672I6G be used with Quartus Prime?

Yes, Quartus Prime Standard Edition supports the MAX 10 family. Compile a test design at the target LE count and I/O utilization before committing the PCB layout — the fitter report will confirm routing closure and I/O bank legality.