Skip to main content
Infineon Technologies CY7C1021DV33-10ZSXI — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C1021DV33-10ZSXI 1Mbit Async SRAM, 10 ns

MPNCY7C1021DV33-10ZSXI
Active

Infineon CY7C1021DV33-10ZSXI, 1Mbit asynchronous SRAM, 10 ns access time, 64K x 16 organization, 3.0-3.6V supply, -40 to 85°C industrial temperature, 44-TSOP II package, Tray.

$1.7664Ref. price · indicative, final on quote
Packaging44-TSOP (0.400", 10.16mm Width)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CY7C1021DV33-10ZSXI specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Voltage3V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C~85°C(TA)
PackageTray
TechnologySRAM - Asynchronous
Access time10 ns
Memory size1Mbit
Memory formatSRAM
Case44-TSOP (0.400\", 10.16mm Width)
Memory organization64K x 16
Write cycle time - word, page10ns

Product details

10 ns asynchronous SRAM for high-speed cache and buffering

The Infineon CY7C1021DV33-10ZSXI is a 1Mbit asynchronous SRAM organized as 64K x 16 bits, with a 10 ns access time and a parallel interface. It operates from a 3.0V to 3.6V supply, making it a direct fit for 3.3V logic systems.

10 ns access — timing margin for the bus

The 10 ns access time and 10 ns write cycle time set the window for address-to-data valid and write strobe timing.

Frequently asked questions

What are the specifications of CY7C1021DV33-10ZSXI?

It is a 1Mbit asynchronous SRAM with 64K x 16 organization, 10 ns access time, 3.0V to 3.6V supply, -40°C to 85°C industrial temperature range, and a parallel interface in a 44-TSOP II package.

Where can I buy CY7C1021DV33-10ZSXI available via RFQ confirmation?

This part is available to order through independent distribution. Pricing and current stock levels are confirmed at quote time against an RFQ — submit a request for a firm quote with lead time.

Does CY7C1021DV33-10ZSXI have RoHS compliance?

The 'I' in the suffix denotes industrial temperature range; the 'X' in the package code indicates RoHS compliance per Infineon's standard part-numbering convention.

What is the access time of CY7C1021DV33-10ZSXI?

The access time is 10 ns for both read and write cycles.

Is CY7C1021DV33-10ZSXI an asynchronous SRAM?

Yes, it is an asynchronous SRAM — no clock input required. Address changes directly enable data output after the access time.