Active 2 Mbit async SRAM in a fine-pitch BGA
The Infineon CY7C1011DV33-10BVXI is an active-production asynchronous SRAM organized as 128K x 16 bits, delivering 2 Mbit of volatile storage with a 10 ns access time. The 10 ns access and write-cycle time sets the bus-margin budget for the memory controller — the data sheet guarantees both read and write at the same 10 ns speed, so the cycle time on the bus is not asymmetric. Housed in a 48-VFBGA (6x8 mm) package, the footprint demands careful PCB layout: the 0.75 mm ball pitch typical for this class of VFBGA requires at least a 4-layer board for fan-out of the 48 balls.
Supply and temperature — single-rail 3.3V with industrial range
Operating from a single 3V to 3.6V supply, the part is a drop-in for 3.3V nominal memory buses common on ARM SoCs, FPGAs, and legacy CPLD-based designs.