Hermetic package and military temperature range
The 5962-8770201RA: Housed in a 20-pin CDIP (0.300", 7.62mm) with a 20-CERDIP supplier device package — the ceramic body and hermetic seal keep moisture and contaminants off the die, making this DAC suitable for high-reliability, military, and aerospace boards where outgassing and humidity cycling are routine. Rated for -55°C to 125°C operating temperature — that is the full military temperature band. A guidance system or satellite payload that sees -55°C on orbit and 125°C during re-entry still holds the DAC inside its specified window.
12-bit multiplying DAC with R-2R architecture
12-bit resolution with a multiplying DAC, R-2R architecture — the output is the product of the digital code and an external reference voltage, so the same DAC can serve both fixed-reference and ratiometric gain-control loops without an internal bandgap. Current-unbuffered output — the raw current from the R-2R ladder is available at the output pin; an external op-amp converts it to a voltage. This gives the system architect control over the output swing, bandwidth, and noise floor through the choice of the I-V converter. Settles to within ±½ LSB in 2 µs typical — at a 500 kHz update rate the output is fully settled before the next conversion starts. For a closed-loop servo updating at 100 kHz, the 2 µs settling leaves 8 µs of margin per cycle. Parallel data interface — all 12 bits are latched simultaneously on a single write strobe. No serial clock to manage; the update latency is one bus cycle plus the settling time.
Supply flexibility and linearity guardband
Operates from a single 5V to 15V supply for both analog and digital rails — no separate Vdd and Vcc. A 5V system runs the DAC on the same rail as the logic; a ±15V system powers it from the positive rail alone. INL is ±2 LSB maximum, DNL is ±4 LSB maximum — the DNL guardband is wider than the INL, which means monotonicity is not guaranteed across the full code range. In a control loop where every code step must move the output in the same direction, the system designer should account for the DNL spread.
