Clock fanout for high-speed serial links
The Texas Instruments CDCLVP1102RGTT is a 1:2 fanout buffer that takes one clock input and delivers two LVPECL outputs at up to 2 GHz. It accepts LVCMOS, LVDS, LVPECL, or LVTTL levels on the input side, making it a universal glue part between different logic families in a clock tree. The signal path is fully differential from input to output, which preserves edge integrity and common-mode rejection when distributing a reference clock across a PCB. Supply voltage spans 2.375 V to 3.6 V.
Because the input accepts multiple standards, you can feed it from a crystal oscillator (LVCMOS) or a previous-stage LVPECL/LVDS source without level-shifting. The output is always LVPECL, so the downstream receivers must be LVPECL-compatible or terminated accordingly.