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Texas Instruments CD74HCT4046AE — Clock & Timing ICs

CD74HCT4046AE PLL IC, 38 MHz, 16-PDIP, -55 to 125°C

MPNCD74HCT4046AE
End of Life

Texas Instruments 74HCT CD74HCT4046AE, Phase-Locked Loop (PLL) with VCO, CMOS I/O, 38 MHz max, 4.5-5.5 V supply, 1 circuit, 1:4 input:output ratio, -55 to 125°C, 16-DIP (0.300", 7.62 mm), through-hole, tube.

$0.77Ref. price · indicative, final on quote
Packaging16-DIP (0.300", 7.62mm)
RoHSROHS3 Compliant
Series74HCT
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CD74HCT4046AE specifications
ParameterValue
TypePhase Lock Loop (PLL)
Series74HCT
MountingThrough Hole
Voltage4.5V ~ 5.5V
Frequency38MHz
Operating temperature-55°C ~ 125°C
PLLYes
InputCMOS
OutputCMOS
PackageTube
Case16-DIP (0.300\", 7.62mm)
Divider (Multiplier)No/No
Number of circuits1
Ratio - Input:Output1:4
Differential - Input:OutputNo/No

Product details

What this PLL brings to the board

The Texas Instruments CD74HCT4046AE is a Phase-Locked Loop (PLL) with an integrated VCO, built on the 74HCT logic family with CMOS-compatible inputs and outputs. It operates from a 4.5 V to 5.5 V supply, making it a direct fit for 5 V TTL/CMOS systems. The single-circuit device provides a 1:4 input-to-output ratio and supports a maximum frequency of 38 MHz. Packaged in a 16-pin PDIP (0.300" wide, 7.62 mm pitch) for through-hole mounting, it is suited for frequency synthesis, clock recovery, and motor-speed control in industrial, telecom, and instrumentation applications where a wide temperature range is required.

The 38 MHz maximum frequency sets the upper bound for the VCO and phase-detector operation. In a typical frequency-multiplier loop, the input reference must stay well below this limit to leave margin for the VCO's capture range and lock time. For designs clocking a microcontroller or FPGA from a lower-frequency crystal, this part can multiply a 1–10 MHz reference up to the 38 MHz ceiling without external dividers. If your target output exceeds 38 MHz, you need a faster PLL — this one will not lock.

Military temperature grade: deployment envelope

The 74HCT family maintains CMOS noise margins across this range, but the VCO centre frequency and phase-detector gain will shift with temperature — budget for a wider lock range in the loop filter design. At 125°C junction, leakage currents increase; the loop filter capacitor should use X7R or C0G dielectric to avoid capacitance derating.

For dual-sourcing flexibility, the CD74HCT7046AE is a pin-compatible variant — same 38 MHz max, same temperature range — but with a 1:2 input-to-output ratio and a different phase-detector architecture, so verify loop stability before substituting.

Frequently asked questions

What is the maximum operating frequency of CD74HCT4046AE?

The CD74HCT4046AE has a maximum operating frequency of 38 MHz. This is the upper limit for the VCO and phase detector; the input reference frequency should be lower to maintain reliable lock.