Dual 4-bit BCD down counter — the timing and reset that matter
The CD40102BNSR is a dual 4-bit BCD down counter from the 4000B CMOS logic family. Each of the two elements counts down from a preset BCD value on the positive edge of the clock. The count rate ceiling is 2.4 MHz — this is the maximum toggle rate the internal flip-flop chain can sustain across the full supply range, so a system clocking above that will miss edges. Reset is asynchronous: the counter clears immediately when the reset line is asserted, independent of the clock. Timing is synchronous for the count operation itself — the preset loads and the down-count transitions are clock-edge aligned.
Supply range and temperature grade — where it fits
Supply voltage spans 3 V to 18 V, which is the full 4000B family range. The operating temperature is -55°C to 105°C — industrial/military grade, not just commercial. A system that sees -40°C cold soak or 85°C ambient has margin on both ends. The 16-SOIC package (0.209", 5.30 mm width) with supplier device package 16-SO is a standard surface-mount footprint. The tape-and-reel option suits automated pick-and-place assembly.