Active production, 48 MHz Cortex-M0 core
The STM32F030C6T6TR: The 48 MHz clock rate sets the ceiling for instruction throughput and peripheral timing — the Cortex-M0 executes most instructions in a single cycle at that speed, so the 48 MHz figure is the actual MIPS ceiling for the core.
Memory budget and I/O count
On-chip memory comprises 32 KB of Flash for the firmware image and 4 KB of SRAM for runtime data and stack. The Flash is organized as 32K x 8 bits, which is the program memory type for the STM32F0 family. 39 general-purpose I/O lines are available in the 48-LQFP package, along with a 12-channel 12-bit analog-to-digital converter. This I/O count supports direct connection to sensors, actuators, and parallel displays without external port expanders in many mid-density designs.
Serial connectivity and peripherals
Serial interfaces include I²C, SPI, and UART/USART, covering the common bus protocols for external EEPROM, sensors, displays, and wireless modules. The peripheral set also includes DMA, POR, PWM, and WDT — the basic timer and watchdog blocks needed for real-time control without external supervisor ICs. An internal oscillator is provided, so the MCU can run without an external crystal for cost-sensitive applications where the internal RC accuracy (±1 % over temperature) is sufficient.
Package and compliance
The STM32F030C6T6TR is supplied in Tape & Reel packaging for automated pick-and-place assembly. It is ROHS3 compliant, meeting the EU environmental directive for lead-free soldering and material restrictions. The base product number is STM32F030, which means the same firmware and peripheral driver library applies across the STM32F030x6/x8 family — a BOM change to a higher-density sibling (e.g., 64 KB Flash) requires no software rewrite.