STMicroelectronics M95080-DFMC6TG — Memory (DRAM / SRAM / Flash / EEPROM)
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STMicroelectronics / Memory (DRAM / SRAM / Flash / EEPROM)

STMicroelectronics M95080-DFMC6TG 8Kbit SPI EEPROM, UFDFPN

MPN M95080-DFMC6TG
Active Spot Stock · 24-48h Dispatch 100% Original Sealed

STMicroelectronics M95080 series 8Kbit SPI EEPROM, 8-UFDFPN exposed pad package, 20 MHz clock, 1.7-5.5V supply, -40 to 85°C, Tape & Reel.

In Stock: 4,524 pcs
MOQ: 1 pcs
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Unit Price (USD)
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1+ pcs
$0.43
10+ pcs
$0.39
30+ pcs
$0.35
100+ pcs
$0.32
500+ pcs
$0.30
1,000+ pcs
$0.28
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$0.43 / ea

4,524 in stock — maximum per order · 3–4 days lead time

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[SPEC] Essential Parameters Snapshot Full Specifications (13)
Package / Case 8-UFDFN Exposed Pad
Supply Voltage 1.7V ~ 5.5V
Speed / Frequency 20 MHz
Memory / RAM 8Kbit

Full Technical Specifications

13 Parameters
M95080-DFMC6TG specifications
Parameter / AttributeSpecification / Value
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage1.7V ~ 5.5V
Clock frequency20 MHz
Memory interfaceSPI
Operating temperature-40°C ~ 85°C (TA)
PackageTape & Reel (TR) Cut Tape (CT)
TechnologyEEPROM
Memory size8Kbit
Memory formatEEPROM
Case8-UFDFN Exposed Pad
Memory organization1K x 8
Write cycle time - word, page5ms
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Standard factory-sealed packaging compliant with EIA-481 standards for automated high-speed SMT pick-and-place lines.

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Technical Details & Description

8Kbit EEPROM in a 2×3 mm footprint

The M95080-DFMC6TG is an 8Kbit serial EEPROM organized as 1K x 8 bits, accessed over an SPI bus at up to 20 MHz. The 1.7V to 5.5V supply range means it can sit on a 1.8V or 3.3V or 5V rail without a separate level translator — the same die works across the board's voltage domains. Housed in an 8-UFDFPN exposed-pad package (2×3 mm body), this is the space-saving variant of the M95080 family. The exposed pad on the underside needs a thermal-land pattern on the PCB — the datasheet's recommended footprint keeps the junction temperature within the -40°C to 85°C operating range.

SPI bus integration and write timing

The SPI interface uses the standard MISO/MOSI/SCK/CS lines — no special protocol handshake beyond the opcode set. The write cycle time is 5 ms per word or page, so a firmware routine that updates a 32-byte parameter block needs to budget that latency between the write command and the next bus transaction. At 20 MHz clock, a full 1K byte read completes in about 410 µs — fast enough for boot-loader parameter fetch or calibration-table load at power-up. The non-volatile retention is rated for 40 years at 85°C per the M95080 family datasheet, though the exact endurance figure (typically 4 million write cycles) is not in this listing's spec table.

Active lifecycle and compliance baseline

The part is sourced through independent distribution; availability and current pricing are confirmed at RFQ against the BOM quantity. The Tape & Reel packaging (Cut Tape option available) suits pick-and-place assembly in medium-to-high volume runs. The 8-UFDFPN package is MSL1 per ST's handling notes — no moisture bake required before reflow if the sealed reel seal is intact.

Frequently asked questions

Will M95080-DFMC6TG drop into a board designed for M95080-RMN6TP without rewiring?

No — the M95080-RMN6TP is in an 8-SOIC package, while the M95080-DFMC6TG uses an 8-UFDFPN exposed pad. The pin functions are the same (SPI bus), but the footprint and pad geometry are different. A board spin or adapter is required.

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