STMicroelectronics M24C08-RMN6TP — Memory (DRAM / SRAM / Flash / EEPROM)
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STMicroelectronics / Memory (DRAM / SRAM / Flash / EEPROM)

STMicroelectronics M24C08-RMN6TP EEPROM, 8Kbit I²C, 400kHz

MPN M24C08-RMN6TP
Active Spot Stock · 24-48h Dispatch 100% Original Sealed

STMicroelectronics M24C08-RMN6TP serial EEPROM, 8Kbit (1K x 8), I²C interface, 400 kHz clock, 1.8 V to 5.5 V supply, 900 ns access time, -40°C to +85°C, 8-SOIC package.

In Stock: 9,415 pcs
MOQ: 5 pcs
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[SPEC] Essential Parameters Snapshot Full Specifications (14)
Package / Case 8-SOIC (0.154", 3.90mm Width)
Supply Voltage 1.8V ~ 5.5V
Speed / Frequency 400 kHz
Memory / RAM 8Kbit
ALT
Facing long factory lead times or allocation on M24C08-RMN6TP? Verified pin-compatible alternatives available with active Shenzhen stock and 100% solder-ready footprint match.

Full Technical Specifications

14 Parameters
M24C08-RMN6TP specifications
Parameter / AttributeSpecification / Value
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage1.8V ~ 5.5V
Clock frequency400 kHz
Memory interfaceI²C
Operating temperature-40°C~85°C(TA)
PackageTape & Reel (TR); Cut Tape (CT)
TechnologyEEPROM
Access time900 ns
Memory size8Kbit
Memory formatEEPROM
Case8-SOIC (0.154\", 3.90mm Width)
Memory organization1K x 8
Write cycle time - word, page5ms
100% Footprint Match · Solder-Ready (No PCB Redesign Needed)

Need Stock or a Drop-in Second-Source for M24C08-RMN6TP?

Package: DIP-8 / SOIC-8 / TSSOP-8 · Pin-compatible replacements with immediate Shenzhen spot stock

Footprint Match 98%
Supply Chain & Allocation Reality:

The 24Cxx row is the settings, calibration and counter memory of a generation of instruments, monitors, meters and chargers: a 2-wire serial EEPROM whose 8-pin footprint never changes from 24C02 to 24C64, and whose address pins A0, A1 and A2 change MEANING at almost every density step. The base device address is always the industry-standard 1010 pattern, the SDA/SCL bus is open-drain with pull-ups, and the WP pin guards the array - and the substitutions that fail are almost never electrical: they are firmware assumptions about word addressing, or a cascade of devices whose address pins just became memory address bits.

Verified Pin-Compatible Replacements (3 verified alternatives)

24C16 Microchip (Atmel) / STMicroelectronics / onsemi DIP-8 / SOIC-8
Pin-to-Pin (Minor Clock/Init Tuning)
Availability & Target Pricing:

The Density Ladder and the Address Pins

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

The same footprint four steps up: while 24C02 uses A0-A2 for hardware addressing (eight devices per bus), 24C04 drops A0, 24C08 drops two of them, and 24C16 repurposes all three as high-order memory address bits - one device per bus.

Identical 1.8-5.5V class envelopes across the row.

Compatibility & Drop-In Notes: The word address width grows with density (8 bits at 24C02 toward 11 at 24C16): firmware that writes with one address byte behaves differently once the address crosses the first 256 bytes. When upgrading density, verify the addressing sequence against the target datasheet, not the old one.
Package & Solder Footprint: DIP-8 pin map never moves: A0-A2, GND, SDA, SCL, WP, VCC.
Shenzhen Warehouse Stock & MOQ: The full ladder stocked; quote density and package together.
24C32 / 24C64 Microchip (Atmel) / STMicroelectronics DIP-8 / SOIC-8
Functional Equivalent
Availability & Target Pricing:

The Two-Byte Address Boundary

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

Beyond 2K bits the family changes address protocol: the word address becomes two bytes - and the address pins return to hardware duty (A0-A2 useful again for up to eight devices).

Same bus; the change is in the byte sequence, not the volts.

Compatibility & Drop-In Notes: Crossing the 24C16 to 24C32 line is a firmware event, not a footprint event: update the addressing, then the pin-based cascade options come back.
Package & Solder Footprint: Same 8-pin body again - the trap of the whole family.
Shenzhen Warehouse Stock & MOQ: Stocked; pair the quote with the addressing the firmware implements.
AT24C02 vs CAT24C02 vs ST24C02 Atmel / onsemi / STMicroelectronics (second sources) DIP-8 / SOIC-8
100% Drop-in (Zero Code Change)
Availability & Target Pricing:

The Second-Source Shelf

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

The family was designed as an industry standard: the same 1010 device address, the same pin map, the same bus behavior under every vendor prefix - the reason a 24Cxx is a specification as much as a part number.

Minor differences live in the margins of the datasheets (timing at the fast modes, internal write cycle specifics) - the standard behaviors are common.

Compatibility & Drop-In Notes: The WP pin deserves the same attention as the address pins: the write-protect behavior depends on the design and sometimes on the vendor internal default - a board that will not save settings after a memory swap usually has WP where the new part does not like it.
Package & Solder Footprint: DIP-8/SOIC-8 shared across vendors.
Shenzhen Warehouse Stock & MOQ: Stocked across prefixes; same density, same suffix, photographed lots.
Buyer & Quality Checklist for Sourcing Alternatives
  • The pin map is eternal: 1-3 A0/A1/A2, 4 GND, 5 SDA, 6 SCL, 7 WP, 8 VCC across every density - the family promise that hides the real variable: what A0-A2 mean at this density.
  • Address-pin roles by density: 24C02 uses all three (eight devices per bus); 24C04 drops A0; 24C08 keeps only A2; 24C16 uses none (they become address bits); 24C32/64 bring them back. Density upgrades can silently break a multi-device cascade.
  • The 256-byte address boundary: 24C02 through 24C16 differ in word-address width, and 24C32 and up change to a two-byte word address - firmware written around one convention misreads after the density step.
  • Open-drain discipline: SDA and SCL need pull-ups (about 10k is the bench default) - a freshly wired or repaired bus without them is the classic intermittent EEPROM that works on the scope and fails in the field.
  • The WP pin is a live design decision: tied low writes freely, tied high locks the array - and designs differ in whether WP floats to an internal state. The "will not save settings" repair starts with WP, then the bus, then the chip.
  • The family is a standard, not a brand: 1010 is the base address under every prefix - buy the density and package against the schematic, and keep the suffix conventions (speed grade, temperature) of the original where the design specified them.
Frequently Asked Technical Questions

Q: Are 24C02 and 24C16 interchangeable?

A: Same 8-pin footprint and bus; different addressing. On the 24C16 the A0-A2 pins are memory address bits rather than hardware address pins, so a single-chip use in the low address space is largely transparent (firmware permitting), while a cascade that separated devices by address pins stops being a cascade.

Q: Can I use a 24C32 instead of a 24C02?

A: The footprint fits, but the protocol changes: 24C32 and up use a two-byte word address, and the A0-A2 pins return to hardware addressing duty. Firmware that assumed the 24C02 sequence must be updated before the density upgrade is real.

Q: Why does my EEPROM stop saving settings after a replacement?

A: In order: the WP pin is not in the state the design expects, the SDA/SCL pull-ups are missing or too weak, or the fitted density changed the addressing convention. The memory itself is the last suspect - and the easiest to test by reading back a known cell.

Technical Details & Description

8Kbit I²C EEPROM for general-purpose non-volatile storage

The M24C08-RMN6TP is an 8Kbit serial EEPROM from STMicroelectronics, organized as 1K x 8 bits and accessed over an I²C bus at up to 400 kHz. It operates from a single 1.8 V to 5.5 V supply, making it compatible with both 3.3 V and 5 V logic systems without a level translator on the I²C lines. The 900 ns access time is the read-cycle ceiling from the array to the output latch — the I²C bus rate, not this figure, sets the actual throughput in a sequential read.

Package, temperature range, and where it fits

Housed in an 8-pin SOIC (3.90 mm width) — the standard narrow-body footprint that matches many existing PCB layouts for 8-pin serial EEPROMs. Rated for -40°C to +85°C ambient, so it suits industrial control, HVAC, and outdoor telecom equipment that sees temperature swings outside the commercial 0–70°C band. Surface-mount assembly with Tape & Reel or Cut Tape options — the reel is the volume-pick for pick-and-place; Cut Tape works for prototypes or small-batch rework.

Write endurance and page-mode timing

The write cycle time is 5 ms for a word or page write — budget this into the firmware update routine; a full 8Kbit rewrite at 16 bytes per page takes roughly 40 ms plus I²C addressing overhead. Non-volatile storage with no battery backup needed — data retention is specified by ST for this EEPROM process, so the calibration constants or configuration byte survive a power loss.

Lifecycle and compliance

RoHS3 compliant (2011/65/EU + 2015/863), with no exemptions listed — it ships lead-free and meets the current EU restriction levels for hazardous substances.

Frequently asked questions

What package does M24C08-RMN6TP come in?

It is supplied in an 8-pin SOIC (0.154", 3.90 mm width) — the narrow-body SOIC-8 footprint that is common for serial EEPROMs and fits many existing PCB layouts.

M24C08-RMN6TP
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