MIC5305-2.5YD5-TR
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RoHS Compliant · Lead-Free EIA-481 Standard
Microchip Technology / Power Management (PMIC / Gate Driver)

MIC5305-2.5YD5-TR LDO Regulator, 150 mA, 2.5 V Fixed

MPN MIC5305-2.5YD5-TR
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Microchip Technology MIC5305-2.5YD5-TR LDO voltage regulator, 150 mA output, fixed 2.5 V, positive output, TSOT-23-5 package, surface mount, active.

In Stock: 336 pcs
MOQ: 1 pcs
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[SPEC] Essential Parameters Snapshot Full Specifications (14)
Package / Case SOT-23-5 Thin, TSOT-23-5

Full Technical Specifications

14 Parameters
MIC5305-2.5YD5-TR specifications
Parameter / AttributeSpecification / Value
Output typeFixed
MountingSurface Mount
Voltage - input5.5V
Voltage - output (Min (Fixed))2.5V
Output current150mA
Current - quiescent150 µA
Operating temperature-40°C ~ 125°C
PSRR85dB ~ 65dB (1kHz ~ 10kHz)
PackageTape & Reel (TR); Cut Tape (CT)
CaseSOT-23-5 Thin, TSOT-23-5
Control featuresEnable
Protection featuresOver Current, Over Temperature
Number of regulators1
Output configurationPositive
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Technical Details & Description

PSRR and noise-sensitive rail fit

The MIC5305-2.5YD5-TR delivers 85 dB of PSRR at 1 kHz, rolling off to 65 dB at 10 kHz — this is the spec that decides whether it cleans up a switching-regulator ripple or lets it through. For an RF or analog front-end rail, the 85 dB at 1 kHz means the LDO attenuates a 100 mVpp ripple at that frequency down to roughly 5.6 µVpp at the output, which is well below the noise floor of a 12-bit ADC or a BLE radio's supply rejection. The 150 mA output at a fixed 2.5 V suits it for powering a low-noise sensor bias, a small FPGA core, or a wireless SoC's analog supply — not a heavy digital rail, but enough for a precision load that cannot tolerate ripple.

Quiescent current and standby budget

At 150 µA quiescent current, the regulator's own draw is about 0.1% of the full load — acceptable for a battery-powered device that spends most of its time in a low-power sleep state, but not the ultra-low-Iq class (sub-1 µA) used for always-on wake circuits. For a sensor node that sleeps at 10 µA system current, the LDO's 150 µA dominates the sleep budget; a load-switch or a lower-Iq LDO would be needed ahead of it. The enable pin lets a microcontroller or a power-management sequencer shut the regulator down entirely, dropping the quiescent current to near zero in standby — a common pattern for gating the analog rail only when the measurement is active.

Temperature range and deployment context

The 125°C ceiling gives margin above the AEC-Q100 Grade 1 ambient limit of 125°C, though this part carries no explicit AEC-Q qualification in the record. The TSOT-23-5 package (1.6 mm × 2.9 mm typical) is a low-profile, small-footprint option for dense PCBs where board area is at a premium. The thin SOT-23 variant shaves about 0.2 mm off the seated height compared to a standard SOT-23, which matters in a stacked-board assembly or a handheld enclosure.

Protection and compliance

Built-in over-current and over-temperature protection means the regulator folds back or shuts down before it damages itself or the load — a standard feature for this class, but one that saves a board spin if the output is accidentally shorted during bench testing.

Frequently asked questions

What is the PSRR of MIC5305-2.5YD5-TR at 1 kHz?

The PSRR is 85 dB at 1 kHz, rolling off to 65 dB at 10 kHz. This means it attenuates a 100 mVpp ripple at 1 kHz to about 5.6 µVpp at the output, which is clean enough for most analog and RF supply rails.

What package does MIC5305-2.5YD5-TR come in?

It is supplied in a TSOT-23-5 package, which is a thin, surface-mount SOT-23 variant.

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