15 ns EE PLD — 8 macrocells in a 20-PLCC footprint
The Microchip ATF16V8CZ-15JU is an electrically erasable programmable logic device (EE PLD) from the 16V8 family, packing eight macrocells with a 15 ns propagation delay. It operates from a 5 V supply and comes in a 20-lead PLCC with J-bend leads (9x9 mm body). This is the classic 20-pin PLD footprint — same as the original 16V8 series — so it drops into legacy socketed or soldered layouts without a board spin.
The 15 ns speed rating is the pin-to-pin propagation delay (tPD) through the device. In a typical address-decode application, that means the PLD output settles 15 ns after the address inputs stabilise.
The 20-PLCC (J-Lead) package is a surface-mount footprint with the leads tucked under the body. The J-bend gives a smaller footprint than an SOIC but requires a specific solder-paste stencil aperture.
That means it is still in the current portfolio — no last-time-buy notice, no forced redesign for legacy BOM lines.