512 Kbit I²C EEPROM for parameter storage
The Microchip AT24C512C-SHM-T is a 512 Kbit serial EEPROM organized as 64K x 8 bits, accessed through an I²C interface at up to 400 kHz. It stores configuration data, calibration constants, or firmware staging tables that need non-volatile retention across power cycles. The 900 ns access time sets the read-cycle timing on the bus — at 400 kHz SCL, each byte read takes about 2.5 µs plus the 900 ns access overhead, which is well within the I²C timing budget for most microcontrollers. The 5 ms page write time is the ceiling for a 64-byte page; a power-loss-safe write sequence should account for this window if the supply is not supervised.
Supply range and logic-level compatibility
At 3.3 V Vcc, the I²C bus pins are 5 V tolerant per the AT24C512C family spec, so it can sit on a mixed-voltage bus with a 5 V master as long as pull-ups reference the EEPROM's supply.
For dual-sourcing flexibility, the AT24C512C-XHM-B is the same die in a tube-shipped 8-SOIC (gull-wing) package — the memory array, interface, and timing are identical, but the package body and lead form differ, so a board respin is required.