Microchip AT24C16D-MAHM-E, 16Kbit I²C EEPROM, 450 ns access time, 1 MHz clock, 1.7V-3.6V supply, -40°C to 85°C, 8-UDFN (2x3 mm).
| Parameter / Attribute | Specification / Value |
|---|---|
| Memory type | Non-Volatile |
| Mounting | Surface Mount |
| Supply voltage | 1.7V ~ 3.6V |
| Clock frequency | 1 MHz |
| Memory interface | I²C |
| Operating temperature | -40°C~85°C(TC) |
| Package | Tape & Reel (TR); Cut Tape (CT) |
| Technology | EEPROM |
| Access time | 450 ns |
| Memory size | 16Kbit |
| Memory format | EEPROM |
| Case | 8-UFDFN Exposed Pad |
| Memory organization | 2K x 8 |
| Write cycle time - word, page | 5ms |
Package: DIP-8 / SOIC-8 / TSSOP-8 · Pin-compatible replacements with immediate Shenzhen spot stock
The 24Cxx row is the settings, calibration and counter memory of a generation of instruments, monitors, meters and chargers: a 2-wire serial EEPROM whose 8-pin footprint never changes from 24C02 to 24C64, and whose address pins A0, A1 and A2 change MEANING at almost every density step. The base device address is always the industry-standard 1010 pattern, the SDA/SCL bus is open-drain with pull-ups, and the WP pin guards the array - and the substitutions that fail are almost never electrical: they are firmware assumptions about word addressing, or a cascade of devices whose address pins just became memory address bits.
The Density Ladder and the Address Pins
Shenzhen Spot Stock (24-48h Dispatch)
The same footprint four steps up: while 24C02 uses A0-A2 for hardware addressing (eight devices per bus), 24C04 drops A0, 24C08 drops two of them, and 24C16 repurposes all three as high-order memory address bits - one device per bus.
Identical 1.8-5.5V class envelopes across the row.
The Two-Byte Address Boundary
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Beyond 2K bits the family changes address protocol: the word address becomes two bytes - and the address pins return to hardware duty (A0-A2 useful again for up to eight devices).
Same bus; the change is in the byte sequence, not the volts.
The Second-Source Shelf
Shenzhen Spot Stock (24-48h Dispatch)
The family was designed as an industry standard: the same 1010 device address, the same pin map, the same bus behavior under every vendor prefix - the reason a 24Cxx is a specification as much as a part number.
Minor differences live in the margins of the datasheets (timing at the fast modes, internal write cycle specifics) - the standard behaviors are common.
Q: Are 24C02 and 24C16 interchangeable?
A: Same 8-pin footprint and bus; different addressing. On the 24C16 the A0-A2 pins are memory address bits rather than hardware address pins, so a single-chip use in the low address space is largely transparent (firmware permitting), while a cascade that separated devices by address pins stops being a cascade.
Q: Can I use a 24C32 instead of a 24C02?
A: The footprint fits, but the protocol changes: 24C32 and up use a two-byte word address, and the A0-A2 pins return to hardware addressing duty. Firmware that assumed the 24C02 sequence must be updated before the density upgrade is real.
Q: Why does my EEPROM stop saving settings after a replacement?
A: In order: the WP pin is not in the state the design expects, the SDA/SCL pull-ups are missing or too weak, or the fitted density changed the addressing convention. The memory itself is the last suspect - and the easiest to test by reading back a known cell.
The Microchip AT24C16D-MAHM-E is a 16 Kbit serial EEPROM organized as 2K x 8 bits, accessed through an I²C interface that runs at 1 MHz — the full fast-mode ceiling. The 5 ms page write cycle means the bus is tied up for that duration unless the host uses the acknowledge-polling method to detect completion.
There is no end-of-life notice, and it remains available for new designs through independent distribution.
The closest functional equivalent within the same family is the AT24CS08-MAHM-E, which is an 8 Kbit (1K x 8) I²C EEPROM in the same 8-UDFN package and supply range, but with half the density and a 550 ns access time. For a pin-compatible drop-in with the same 16 Kbit density, the through-hole AT24C16D-PUM shares the same core specs but uses a DIP package.
Submit an RFQ through this listing.