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Microchip Technology AT24C04C-XHM-T — Memory (DRAM / SRAM / Flash / EEPROM)
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RoHS Compliant · Lead-Free EIA-481 Standard
Microchip Technology / Memory (DRAM / SRAM / Flash / EEPROM)

Microchip AT24C04C-XHM-T 4Kbit I²C EEPROM, 1 MHz, 8-TSSOP

MPN AT24C04C-XHM-T
Active Spot Stock · 24-48h Dispatch 100% Original Sealed

Microchip AT24C04C-XHM-T, 4Kbit serial EEPROM, I²C interface, 1 MHz clock frequency, 550 ns access time, 1.7V to 5.5V supply, 512 x 8 organization, -40°C to 85°C, 8-TSSOP package.

In Stock: 2,289 pcs
MOQ: 1 pcs
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Dispatch: Shenzhen / HK
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$0.78 / pc
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$0.78
10+ pcs
$0.64
30+ pcs
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$0.46
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$0.44
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100% Original Sealed 45x Microscope QC 30-Day Warranty · COC USD T/T & PI · DAP/DDP
[SPEC] Essential Parameters Snapshot Full Specifications (14)
Package / Case 8-TSSOP (0.173", 4.40mm Width)
Supply Voltage 1.7V ~ 5.5V
Speed / Frequency 1 MHz
Memory / RAM 4Kbit
ALT
Facing long factory lead times or allocation on AT24C04C-XHM-T? Verified pin-compatible alternatives available with active Shenzhen stock and 100% solder-ready footprint match.
View Pin Alternates (3)

Full Technical Specifications

14 Parameters
AT24C04C-XHM-T specifications
Parameter / AttributeSpecification / Value
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage1.7V ~ 5.5V
Clock frequency1 MHz
Memory interfaceI²C
Operating temperature-40°C~85°C(TA)
PackageTape & Reel (TR); Cut Tape (CT)
TechnologyEEPROM
Access time550 ns
Memory size4Kbit
Memory formatEEPROM
Case8-TSSOP (0.173\", 4.40mm Width)
Memory organization512 x 8
Write cycle time - word, page5ms
100% Footprint Match · Solder-Ready (No PCB Redesign Needed)

Need Stock or a Drop-in Second-Source for AT24C04C-XHM-T?

Package: DIP-8 / SOIC-8 / TSSOP-8 · Pin-compatible replacements with immediate Shenzhen spot stock

Footprint Match 98%
Supply Chain & Allocation Reality:

The 24Cxx row is the settings, calibration and counter memory of a generation of instruments, monitors, meters and chargers: a 2-wire serial EEPROM whose 8-pin footprint never changes from 24C02 to 24C64, and whose address pins A0, A1 and A2 change MEANING at almost every density step. The base device address is always the industry-standard 1010 pattern, the SDA/SCL bus is open-drain with pull-ups, and the WP pin guards the array - and the substitutions that fail are almost never electrical: they are firmware assumptions about word addressing, or a cascade of devices whose address pins just became memory address bits.

Verified Pin-Compatible Replacements (3 verified alternatives)

24C16 Microchip (Atmel) / STMicroelectronics / onsemi DIP-8 / SOIC-8
Pin-to-Pin (Minor Clock/Init Tuning)
Availability & Target Pricing:

The Density Ladder and the Address Pins

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

The same footprint four steps up: while 24C02 uses A0-A2 for hardware addressing (eight devices per bus), 24C04 drops A0, 24C08 drops two of them, and 24C16 repurposes all three as high-order memory address bits - one device per bus.

Identical 1.8-5.5V class envelopes across the row.

Compatibility & Drop-In Notes: The word address width grows with density (8 bits at 24C02 toward 11 at 24C16): firmware that writes with one address byte behaves differently once the address crosses the first 256 bytes. When upgrading density, verify the addressing sequence against the target datasheet, not the old one.
Package & Solder Footprint: DIP-8 pin map never moves: A0-A2, GND, SDA, SCL, WP, VCC.
Shenzhen Warehouse Stock & MOQ: The full ladder stocked; quote density and package together.
Request Volume Quote for 24C16 Compare AT24C04C-XHM-T vs 24C16 Spec Matrix
24C32 / 24C64 Microchip (Atmel) / STMicroelectronics DIP-8 / SOIC-8
Functional Equivalent
Availability & Target Pricing:

The Two-Byte Address Boundary

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

Beyond 2K bits the family changes address protocol: the word address becomes two bytes - and the address pins return to hardware duty (A0-A2 useful again for up to eight devices).

Same bus; the change is in the byte sequence, not the volts.

Compatibility & Drop-In Notes: Crossing the 24C16 to 24C32 line is a firmware event, not a footprint event: update the addressing, then the pin-based cascade options come back.
Package & Solder Footprint: Same 8-pin body again - the trap of the whole family.
Shenzhen Warehouse Stock & MOQ: Stocked; pair the quote with the addressing the firmware implements.
Request Volume Quote for 24C32 / 24C64 Compare AT24C04C-XHM-T vs 24C32 / 24C64 Spec Matrix
AT24C02 vs CAT24C02 vs ST24C02 Atmel / onsemi / STMicroelectronics (second sources) DIP-8 / SOIC-8
100% Drop-in (Zero Code Change)
Availability & Target Pricing:

The Second-Source Shelf

Shenzhen Spot Stock (24-48h Dispatch)

Electrical & Core Specs:

The family was designed as an industry standard: the same 1010 device address, the same pin map, the same bus behavior under every vendor prefix - the reason a 24Cxx is a specification as much as a part number.

Minor differences live in the margins of the datasheets (timing at the fast modes, internal write cycle specifics) - the standard behaviors are common.

Compatibility & Drop-In Notes: The WP pin deserves the same attention as the address pins: the write-protect behavior depends on the design and sometimes on the vendor internal default - a board that will not save settings after a memory swap usually has WP where the new part does not like it.
Package & Solder Footprint: DIP-8/SOIC-8 shared across vendors.
Shenzhen Warehouse Stock & MOQ: Stocked across prefixes; same density, same suffix, photographed lots.
Request Volume Quote for AT24C02 vs CAT24C02 vs ST24C02 Compare AT24C04C-XHM-T vs AT24C02 vs CAT24C02 vs ST24C02 Spec Matrix
Buyer & Quality Checklist for Sourcing Alternatives
  • The pin map is eternal: 1-3 A0/A1/A2, 4 GND, 5 SDA, 6 SCL, 7 WP, 8 VCC across every density - the family promise that hides the real variable: what A0-A2 mean at this density.
  • Address-pin roles by density: 24C02 uses all three (eight devices per bus); 24C04 drops A0; 24C08 keeps only A2; 24C16 uses none (they become address bits); 24C32/64 bring them back. Density upgrades can silently break a multi-device cascade.
  • The 256-byte address boundary: 24C02 through 24C16 differ in word-address width, and 24C32 and up change to a two-byte word address - firmware written around one convention misreads after the density step.
  • Open-drain discipline: SDA and SCL need pull-ups (about 10k is the bench default) - a freshly wired or repaired bus without them is the classic intermittent EEPROM that works on the scope and fails in the field.
  • The WP pin is a live design decision: tied low writes freely, tied high locks the array - and designs differ in whether WP floats to an internal state. The "will not save settings" repair starts with WP, then the bus, then the chip.
  • The family is a standard, not a brand: 1010 is the base address under every prefix - buy the density and package against the schematic, and keep the suffix conventions (speed grade, temperature) of the original where the design specified them.
Frequently Asked Technical Questions

Q: Are 24C02 and 24C16 interchangeable?

A: Same 8-pin footprint and bus; different addressing. On the 24C16 the A0-A2 pins are memory address bits rather than hardware address pins, so a single-chip use in the low address space is largely transparent (firmware permitting), while a cascade that separated devices by address pins stops being a cascade.

Q: Can I use a 24C32 instead of a 24C02?

A: The footprint fits, but the protocol changes: 24C32 and up use a two-byte word address, and the A0-A2 pins return to hardware addressing duty. Firmware that assumed the 24C02 sequence must be updated before the density upgrade is real.

Q: Why does my EEPROM stop saving settings after a replacement?

A: In order: the WP pin is not in the state the design expects, the SDA/SCL pull-ups are missing or too weak, or the fitted density changed the addressing convention. The memory itself is the last suspect - and the easiest to test by reading back a known cell.

Technical Details & Description

4Kbit I²C EEPROM in an 8-TSSOP — what this part does

The Microchip AT24C04C-XHM-T is a 4Kbit serial EEPROM organized as 512 x 8 bits, accessed through an I²C interface running up to 1 MHz. It stores configuration data, calibration constants, or small firmware parameters that need non-volatile retention across power cycles.

Rated from 1.7V to 5.5V, this part covers the common digital logic rails without extra regulation. If your assembly sees sustained 105°C ambient, this grade won't cover it — the part is specced for 85°C ambient, not junction.

Access time and write cycle — timing on the bus

At 550 ns access time, the AT24C04C-XHM-T keeps up with a 1 MHz I²C clock without stretching the SCL line on reads. The 5 ms write cycle time per word or page means a firmware update writing 64 bytes in page mode takes about 80 ms — budget that into your power-down sequence if you're writing before sleep.

Package — 8-TSSOP, tape and reel

Housed in an 8-TSSOP (4.40 mm wide body), this is a surface-mount part for automated assembly. The footprint matches the industry-standard 8-pin TSSOP layout, so a board already routed for a 24C-series EEPROM in this package should accept it without a layout change.

The base product number AT24C04 covers a family of 4Kbit I²C EEPROMs in various packages and temperature grades — the -C revision is the current silicon.

Frequently asked questions

Is AT24C04C-XHM-T RoHS compliant?

Yes, it is rated ROHS3 Compliant per Microchip's lifecycle data.

Can AT24C04C-XHM-T replace AT24C04B-XHM-T?

The AT24C04C is the current silicon revision and is pin-compatible with the AT24C04B in the same 8-TSSOP package. The -C variant uses the same I²C protocol and 1 MHz clock, so a drop-in replacement is expected, but verify the write cycle timing and supply range against your specific BOM — the -C datasheet should be reviewed for any subtle timing changes.

What is the difference between AT24C04C-XHM-T and AT24C04D?

The AT24C04D is a newer die revision with a faster access time (4.5 µs typical vs 550 ns for the -C) and operates over the same 1.7V to 5.5V range. Both are 4Kbit I²C EEPROMs in 8-TSSOP, but the -D part uses a different silicon process and may have slightly different write-cycle endurance or timing margins. Check the respective datasheets for exact parametric differences before substituting.

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