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Microchip Technology 24LC32AT-I/MC — Memory (DRAM / SRAM / Flash / EEPROM)

Microchip 24LC32AT-I/MC 32Kbit I²C EEPROM, 400 kHz, 8-DFN

MPN24LC32AT-I/MC
End of Life

Microchip 24LC32AT-I/MC, 32Kbit I²C Serial EEPROM, 400 kHz clock, 900 ns access, 2.5V–5.5V supply, -40°C to +85°C, 8-VFDFN Exposed Pad (2x3 mm), Tape & Reel.

$0.56Ref. price · indicative, final on quote
Packaging8-VFDFN Exposed Pad
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

24LC32AT-I/MC specifications
ParameterValue
Memory typeNon-Volatile
MountingSurface Mount
Voltage2.5V ~ 5.5V
Frequency400 kHz
Memory interfaceI²C
Operating temperature-40°C ~ 85°C (TA)
PackageTape & Reel (TR); Cut Tape (CT)
TechnologyEEPROM
Access time900 ns
Memory size32Kbit
Memory formatEEPROM
Case8-VFDFN Exposed Pad
Memory organization4K x 8
Write cycle time - word, page5ms

Product details

32 Kbit I²C EEPROM in a 2x3 mm DFN

The Microchip 24LC32AT-I/MC is a 32 Kbit (4K x 8) serial EEPROM with an I²C interface, clocked at 400 kHz and rated for 900 ns access time. The 8-VFDFN package with exposed pad (2x3 mm DFN) saves board area compared to SOIC alternatives.

I²C bus timing and write-cycle budget

At 400 kHz the I²C bus runs standard fast-mode; the 900 ns access time means the host waits one clock cycle after addressing before data appears. The 5 ms write-cycle time per page (word/page write) sets the upper bound for firmware update loops — a 32-byte page write takes 5 ms, so a full 4 KB array rewrite takes about 640 ms if done page by page. That matters for OTA staging or calibration updates where the system must not stall the main loop.

Frequently asked questions

What is the memory size of 24LC32AT-I/MC?

The memory size is 32 Kbit, organized as 4K x 8 bits.