1 MHz I²C bus, 4Kbit, 8-TSSOP — active production
The 24FC04HT-I/ST is a 4Kbit serial EEPROM from Microchip's 24FC04 family, communicating over an I²C bus at up to 1 MHz. That clock rate is the key differentiator versus the more common 400 kHz parts — if your bus already runs a 1 MHz master, this part keeps the same bit rate without needing a clock divider or wait-state insertion for the memory access. The 450 ns random read access time means the first data byte appears on the bus within that window after the address; for a 1 MHz clock (1 µs period), the access completes inside one clock cycle, which matters when the MCU is polling status registers in a tight control loop. Supply voltage spans 1.7V to 5.5V, so it works directly on a 1.8V or 3.3V rail without a level shifter or a dedicated regulator.
Memory organization and write-cycle timing
Internally the 4Kbit array is organized as 256 x 8 x 2, meaning two 256-byte pages. The page write cycle time is 5 ms — after the last data byte is clocked in, the internal write completes in 5 ms before the next I²C start condition can be sent. That is standard for this density class; the 24FC04-E/MS and AT24CSW040-STUM-T both list the same 5 ms page write. Compared to the AT24C04C-XHM-T, which has a 550 ns access time and a 512 x 8 organization, the 24FC04HT-I/ST offers a 100 ns faster read access (450 ns vs 550 ns) — a meaningful edge when the bus master is time-slicing multiple I²C slaves. The AT24C04C also operates at 1 MHz but its 512 x 8 layout changes the address byte mapping; a firmware change is needed if you swap between the two.
Active lifecycle, ROHS3, and sourcing posture
The 8-TSSOP package is a common footprint shared with many other 8-pin serial EEPROMs, so the PCB layout is not locked to Microchip alone — the AT24CSW040-STUM-T comes in the same 8-TSSOP package and is a functional alternate, though its memory map is 512 x 8 rather than 256 x 8 x 2. Submit an RFQ for the exact quantity and target lead time.