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Microchip Technology 24FC04-E/MS — Memory (DRAM / SRAM / Flash / EEPROM)

Microchip 24FC04-E/MS I²C EEPROM, 4Kbit, 1 MHz, 125°C

MPN24FC04-E/MS
End of Life

Microchip 24FC04-E/MS, 4Kbit I²C EEPROM, 1 MHz clock, 450 ns access time, 1.7V-5.5V supply, -40°C to 125°C, 8-MSOP package, Tube.

$0.38Ref. price · indicative, final on quote
Microchip Technology 24FC04-E/MS datasheet (PDF)
Packaging8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

24FC04-E/MS specifications
ParameterValue
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage1.7V ~ 5.5V
Clock frequency1 MHz
Memory interfaceI²C
Operating temperature-40°C ~ 125°C (TA)
PackageTube
TechnologyEEPROM
Access time450 ns
Memory size4Kbit
Memory formatEEPROM
Case8-TSSOP, 8-MSOP (0.118\", 3.00mm Width)
Memory organization256 x 8 x 2
Write cycle time - word, page5ms

Product details

125°C-rated I²C EEPROM for harsh environments

The Microchip 24FC04-E/MS is a 4Kbit serial EEPROM with an I²C interface, organized as 256 x 8 x 2 bytes. The 1 MHz clock rate and 450 ns access time mean it keeps up with a fast I²C bus without inserting wait states on back-to-back reads.

The supply range spans 1.7V to 5.5V, covering 1.8V, 2.5V, 3.3V, and 5V logic rails without a separate level translator or LDO. That simplifies the BOM when the MCU runs at 3.3V and a sensor or actuator on the same bus needs 5V — the EEPROM sits on whichever rail the bus master uses.

Frequently asked questions

Is 24FC04-E/MS a drop-in replacement for 24LC04?

The 24FC04-E/MS is the extended-temperature variant of the 24LC04 family. Electrically they are pin-compatible, so if your board already runs a 24LC04 and you need higher temperature margin, the 24FC04-E/MS drops in without a layout change.

What is the clock frequency of 24FC04-E/MS?

The maximum clock frequency is 1 MHz, which is the fast-mode Plus (Fm+) rate for I²C. At this speed the 450 ns access time keeps the part ready for back-to-back reads without wait states.