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Infineon Technologies FM28V020-SG — Memory (DRAM / SRAM / Flash / EEPROM)

FM28V020-SG F-RAM 256Kbit Parallel FRAM, 140 ns Access

MPNFM28V020-SG
End of Life

Infineon F-RAM™ series, FM28V020-SG, 256Kbit (32K x 8) Parallel FRAM, 140 ns access time, 2V-3.6V supply, -40°C to 85°C, 28-SOIC (7.50mm width), Tube.

$12.37Ref. price · indicative, final on quote
Packaging28-SOIC (0.295", 7.50mm Width)
RoHSROHS3 Compliant
SeriesF-RAM™
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

FM28V020-SG specifications
ParameterValue
SeriesF-RAM™
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage2V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTube
TechnologyFRAM (Ferroelectric RAM)
Access time140 ns
Memory size256Kbit
Memory formatFRAM
Case28-SOIC (0.295\", 7.50mm Width)
Memory organization32K x 8
Write cycle time - word, page140ns

Product details

The Infineon FM28V020-SG is a 256Kbit non-volatile FRAM memory organized as 32K x 8 bits, accessed through a standard parallel interface. It combines the write speed of SRAM — 140 ns write cycle time, word or page — with the retention of a non-volatile technology that requires no battery backup.

Housed in a 28-SOIC wide-body package with a 7.50 mm body width, the FM28V020-SG shares the same JEDEC footprint as many legacy parallel SRAMs and EEPROMs. If you are replacing a battery-backed SRAM or an older parallel EEPROM in a 28-SOIC socket, verify the pinout against your existing part — the FRAM pin assignment follows the industry-standard 28-pin parallel memory map, but a quick cross-check saves a board spin.

Frequently asked questions

What is the access time of FM28V020-SG?

The FM28V020-SG has a 140 ns access time and a 140 ns write cycle time (word or page).

Is FM28V020-SG RoHS compliant?

Yes, the FM28V020-SG is ROHS3 compliant.

Is FM28V020-SG compatible with 3.3V logic?

Yes, the 2V to 3.6V supply range includes 3.3V, so the part operates directly with 3.3V CMOS logic without level translation.