256K x 36 synchronous SRAM at 100 MHz
The Cypress CY7C1361A-100AC is a 9Mbit synchronous SDR (Single Data Rate) SRAM organized as 256K words by 36 bits. The parallel memory interface and 3.135V to 3.6V supply range align with 3.3V logic families common in mid-2000s designs.
Because this is an end-of-life part with no direct Cypress replacement, buyers should verify stock depth and consider a last-time-buy quantity if the design cannot migrate to a newer synchronous SRAM family. The 100-LQFP footprint (14x20 mm) is common across many Cypress 9Mbit SDR SRAM variants, so a form-fit-function substitute may exist within the same package — but no pin-compatible alternate is officially documented.
Housed in a 100-lead LQFP (14x20 mm body), the CY7C1361A-100AC is a surface-mount device. The fine-pitch leads require careful solder-paste stencil design and reflow profile control.