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Infineon Technologies CY7C132-35PC — Memory (DRAM / SRAM / Flash / EEPROM)

CY7C132-35PC Infineon SRAM 16Kbit 35ns DIP-48 Obsolete

MPNCY7C132-35PC
Obsolete

Infineon Technologies SRAM - Dual Port, Asynchronous, CY7C132-35PC, 16Kbit (2K x 8), 35 ns, 4.5V~5.5V, 0°C~70°C, 48-DIP (0.600", 15.24mm), Tube.

Infineon Technologies CY7C132-35PC datasheet (PDF)
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C132-35PC specifications
ParameterValue
Memory typeVolatile
MountingThrough Hole
Voltage4.5V ~ 5.5V
Memory interfaceParallel
Operating temperature0°C~70°C(TA)
PackageTube
TechnologySRAM - Dual Port, Asynchronous
Access time35 ns
Memory size16Kbit
Memory formatSRAM
Case48-DIP (0.600\", 15.24mm)
Memory organization2K x 8
Write cycle time - word, page35ns

Product details

The CY7C132-35PC is classified by Infineon as Obsolete.

16Kbit dual-port SRAM in 48-pin DIP

This device is a 16Kbit asynchronous dual-port SRAM organized as 2K x 8 bits. The dual-port architecture allows two independent systems or processors to access the same memory array simultaneously through separate address, data, and control buses — useful for shared-memory, FIFO, or mailbox applications in legacy bus architectures. Access time is 35 ns, and the write-cycle time matches at 35 ns for word and page modes. Packaged in a 48-lead plastic DIP with 0.600-inch (15.24 mm) row spacing, this through-hole package suits prototyping, legacy system repair, or retrofit into sockets on existing boards. The supplier device package is 48-PDIP. Tube packaging is standard for this order code.

Frequently asked questions

What package does the CY7C132-35PC use?

The CY7C132-35PC is supplied in a 48-lead plastic DIP (dual in-line package) with 0.600-inch (15.24 mm) row spacing, also referred to as 48-PDIP. It is a through-hole package shipped in Tube format.