5 V asynchronous SRAM in a 36-SOJ footprint
The device is housed in a 36-SOJ (BSOJ) surface-mount package, a footprint common in late-1990s to mid-2000s embedded systems, telecom line cards, and test equipment that required fast, byte-wide scratchpad memory on a 5 V rail.
Buyers should verify date code freshness and inspect for moisture sensitivity (MSL) before reflow, as inventory may carry extended shelf age.
17 ns access time — timing budget for legacy buses
The 17 ns access time defines the window from address assertion to valid data on the outputs. For a 5 V system running a 33 MHz to 50 MHz bus, this rating provides roughly one to two clock cycles of margin, depending on the memory controller's setup/hold requirements. If your design originally used a slower SRAM (e.g., 25 ns or 20 ns), this part will meet timing; if you are migrating to a faster controller, verify that the 17 ns window does not violate the minimum address-hold time.
Package and supply rail considerations
The 36-SOJ package (body width 10.16 mm, 0.400 inch) is a JEDEC-standard SOJ footprint. It is surface-mount but not a fine-pitch BGA, so rework with a hot-air station is feasible.