Synchronous dual-port SRAM for shared-memory arbitration
The CY7C09169AV-12AXC: 144Kbit synchronous dual-port SRAM organized as 16K x 9. 12 ns access time, 50 MHz clock. 9-bit width suits networking with parity. 0°C to 70°C limits to indoor use.
Marked Obsolete by Infineon. No last-time-buy window remains. Sourced to order against RFQ.
