2 Mbit parallel SRAM in 32-pin STSOP
The CY62138FV30LL-45ZAXA is a 2 Mbit asynchronous SRAM from Infineon's MoBL® (More Battery Life) series, organized as 256K words by 8 bits. The parallel interface with a 45 ns access time and 45 ns write cycle time suits bus-matched applications where the memory sits directly on a microcontroller's external address/data bus without wait-state insertion at moderate clock rates.
The 32-lead STSOP (Shrink Thin Small Outline Package) with 0.65 mm pitch requires a standard surface-mount reflow profile. The package is surface-mount only, not socketed, so the board layout must match the JEDEC footprint for this body size.
Active production — no end-of-life notice
For a BOM that requires a 2 Mbit, 45 ns parallel SRAM at 2.2 V, this order code is the direct fit.