130 MHz clock generator with PLL bypass — what it does on the board
The Cypress CY2907F14I is a single-circuit clock generator and fanout distribution IC that accepts either a crystal or a clock input and produces two clock outputs, one of which can be conditioned by an on-chip PLL that also supports a bypass mode. The PLL multiplies the reference up to 130 MHz, and the bypass path lets the input pass through unmodified — useful for system debug or for jitter-sensitive clock domains where the PLL should be switched out. The 1:2 input-to-output ratio means one reference fans out to two destinations, saving a separate buffer on the board.
The CY2907F14I accepts either a 3 V to 3.6 V supply or a 4.5 V to 5.5 V supply.
Commercial temperature grade — indoor, controlled environments
14-SOIC footprint — standard layout, easy swap
The part is RoHS non-compliant, which means it uses tin-lead solder finish — verify that your assembly house accepts non-RoHS parts if the board requires full RoHS compliance.