PLL-based clock generation for Rambus memory systems
The Infineon CY2212ZC-2 is a PLL-based clock generator from the Direct Rambus™ series, designed to produce a low-jitter clock output from a crystal input. It accepts a crystal reference and outputs a single-ended LVCMOS clock at up to 9.375 MHz, with a secondary 400 Hz output — the wide ratio suits applications requiring both a high-speed system clock and a low-frequency reference for power management or slow peripherals. The 1:2 input-to-output ratio and integrated divider/multiplier allow frequency synthesis without an external PLL loop filter.
Package and supply considerations
Housed in a 16-lead TSSOP with a 4.40 mm body width, the CY2212ZC-2 fits standard surface-mount assembly processes. The differential output capability (input single-ended, output differential) means the LVCMOS output can drive a point-to-point clock line with controlled impedance, though the single-ended input simplifies the crystal interface. No external PLL components are needed beyond the crystal and load capacitors.
Lifecycle and compliance
It is RoHS non-compliant (contains lead), which restricts its use in RoHS-mandated markets unless an exemption applies.