5-tap silicon delay line for timing alignment
The Maxim Integrated DS1100LZ-45+ is a nonprogrammable silicon delay line that provides five equally spaced taps from a single input, with a total delay of 45 ns and a tap increment of 9 ns. It operates from a 3V to 3.6V supply and is specified over the industrial temperature range of -40°C to +85°C, making it suitable for timing alignment, pulse stretching, and clock deskew in 3.3V logic systems.
What the tap structure means for your design
Five taps at 9 ns each give a 45 ns window with 9 ns resolution.
The 8-SOIC (0.154", 3.90 mm width) package is a standard surface-mount footprint, compatible with automated pick-and-place and reflow soldering.
It is RoHS3 compliant (ROHS3 Compliant), free of the ten restricted substances.