4 MHz clock source — what the ratings decide
The ASV-4.000MHZ-E-T: Frequency stability is ±100 ppm, which is the commercial-grade floor for logic timing — it accumulates roughly ±8.6 seconds of drift per day, acceptable for UART, I2C, and general MCU clocks but not for precision timing or RTC accuracy requirements that need TCXO or OCXO grades. The enable/disable function draws 10 mA when enabled and drops to 10 µA in shutdown — the MCU can gate the oscillator to eliminate the quiescent draw during deep sleep without removing the supply rail, a common pattern in battery-powered designs where the sleep current budget is tight.
Temperature grade and supply integration
The 3.3 V supply aligns with the most common 3.3 V MCU and FPGA families directly, so no level-shifting or separate rail is needed at the clock input. Maximum supply current is 10 mA; the oscillator should be decoupled close to the package with a 100 nF ceramic bypass — the HCMOS output drives standard logic thresholds, so no special termination is required for short trace runs to the destination device.
Listed as Active by Abracon LLC — suitable for new designs and BOM maintenance without a lifecycle risk flag. Tape-and-reel and cut-tape packaging options are listed, which matters for high-volume SMT assembly vs low-volume prototyping.