Bus latch with muscle — the 74ABT edge
The SN74ABT373DW: It holds eight data bits when the latch-enable (LE) goes low, and the tri-state outputs let multiple devices share a bus without contention. Propagation delay is 4.6 ns, output drive is 32 mA source and 64 mA sink.
4.6 ns propagation delay — bus timing margin
At 4.6 ns propagation delay, this latch provides timing margin for fast bus cycles. The speed jump from older families is significant.
32/64 mA output drive — what it buys you
The 32 mA high-level and 64 mA low-level output current are double what most 5 V logic families offer. This matters when the latch is driving a long trace, a cable, or multiple CMOS inputs. It also means the outputs can directly drive an optocoupler LED or a small relay coil with a series resistor — no separate transistor stage needed.
20-SOIC footprint — board layout notes
The wide body improves thermal dissipation compared to the narrow SOIC variant, though with 64 mA max output the junction temperature is rarely a concern at 25°C ambient. Decouple with a 0.1 µF ceramic within 5 mm of the supply pin.