Quad 2-input AND gate in 16-SOIC — 8 ns propagation delay at 5 V
The 74ACT11008D: Each of the four gates can sink or source 24 mA, enough to drive multiple CMOS inputs or a single TTL load without a buffer stage.
Supply rails, temperature grade, and quiescent draw
Quiescent current is 4 µA maximum — the gate's own draw is negligible in a battery-backed or always-on subsystem where every microamp matters.
Input thresholds and output drive
Input logic-low threshold is 0.8 V maximum, and logic-high is 2 V minimum — these are 5 V TTL-compatible levels, so the gate interfaces directly with 5 V TTL outputs without a level translator. The 24 mA symmetric output drive (both high and low) means the gate can switch a standard LED through a 220 Ω resistor or drive the clock input of a flip-flop across a short PCB trace without edge degradation.