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Microchip Technology 24LC21A/SN — Microcontrollers & Processors (MCU / MPU / DSP)

Microchip 24LC21A/SN EEPROM, 1Kbit I2C 400kHz 8-SOIC

MPN24LC21A/SN
End of Life

Microchip 24LC21A/SN serial EEPROM, 1Kbit (128 x 8), I2C interface, 400 kHz clock frequency, 900 ns access time, 2.5V to 5.5V supply, 0°C to 70°C operating temperature, 8-SOIC package, tube.

$0.5Ref. price · indicative, final on quote
Packaging8-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

24LC21A/SN specifications
ParameterValue
Memory typeNon-Volatile
MountingSurface Mount
Voltage2.5V ~ 5.5V
Frequency400 kHz
Memory interfaceI2C
Operating temperature0°C ~ 70°C (TA)
PackageTube
TechnologyEEPROM
Access time900 ns
Memory size1Kbit
Memory formatEEPROM
Case8-SOIC (0.154\", 3.90mm Width)
Memory organization128 x 8
Write cycle time - word, page10ms

Product details

1 Kbit I2C EEPROM for parameter storage

The Microchip 24LC21A/SN is a 1 Kbit serial EEPROM organized as 128 x 8 bits, communicating over an I2C bus at up to 400 kHz. It stores configuration data, calibration constants, or small lookup tables in a non-volatile memory that retains content without power. The 900 ns access time is the read-cycle window the master must respect; at 400 kHz the bus clock period is 2.5 µs, so the EEPROM's output data is valid well within one clock cycle, leaving margin for bus capacitance and trace delay.

Write cycle time and endurance considerations

Firmware must poll the acknowledge polling or wait the full 10 ms before initiating the next write.

Housed in an 8-pin SOIC with 3.90 mm body width (the 0.154" narrow SOIC), surface-mount soldered directly to the PCB. The tube shipment is typical for engineering samples or low-volume production; for reel quantities, check the alternate 24LC21A/SN-G or similar tape-and-reel suffix variants.

Frequently asked questions

What is the access time of 24LC21A/SN?

The access time is 900 ns. This is the time from the I2C slave address acknowledge to valid data on the SDA line during a read operation. At a 400 kHz bus clock (2.5 µs period), the 900 ns window is comfortably met, but it does set a minimum SCL low time for the master if running near the maximum frequency.

What is the write cycle time of 24LC21A/SN?

After the master sends the data and stop condition, the EEPROM enters an internal programming cycle that lasts up to 10 ms. During this time the device does not acknowledge its slave address; firmware must poll for acknowledge or wait the full 10 ms before attempting the next write.

Is 24LC21A/SN available in tape and reel?

This specific listing is in tube packaging. Microchip offers tape-and-reel variants of the 24LC21A family; check the full order code suffix (e.g., 24LC21A/SN-G for tape-and-reel) if your pick-and-place line requires reel feed.

What is the difference between 24LC21A/SN and 24LC21A?

The /SN suffix denotes the 8-pin SOIC package (3.90 mm width). The base part number 24LC21A without a suffix typically refers to the die or a different package variant.