128 Kbit SPI EEPROM for config storage and parameter logging
The Microchip 25AA128T-I/SN is a 128 Kbit serial EEPROM organized as 16K x 8 bits, accessed over an SPI bus at clock frequencies up to 10 MHz. It stores firmware parameters, calibration tables, and event logs in designs where non-volatile memory must survive power loss and retain data for years.
Peer parts in the 25LC family (25LC080, 25LC256) specify a 2.5 V minimum, which locks them to 3.3 V or higher rails. The 25AA128T-I/SN runs directly off a 1.8 V core supply in low-power designs, or off a 5 V bus in industrial PLC I/O cards, without a separate regulator or voltage translation on the memory rail. That saves a component and a PCB trace.
Write cycle timing and endurance for field-update planning
Page and word writes complete in 5 ms maximum. For a 128 Kbit device that means a full-chip rewrite (128 pages) takes about 640 ms, assuming no polling delays. That timing matters when sizing the firmware update window or the data-logging interval: you need to hold the SPI lines stable and the supply within range for the full write cycle, or the page may be corrupted. The evidence does not cite a specific endurance cycle count, but the 5 ms write time is consistent with standard EEPROM page-write behavior.