256 Mbit NOR Flash on a Quad SPI bus
That Quad I/O mode lets you push data at roughly four times the rate of a standard SPI read — useful when the host MCU is executing code directly from flash (XIP) or loading a large FPGA configuration image quickly. Package is a 16-pin SOIC, 7.50 mm wide body, surface-mount. That footprint is a standard for serial NOR Flash, so board layout reuse across density upgrades in the FL-S family is straightforward.
