Memory map and protocol stack
The ESP32-H2FH2 carries 2MB on-chip flash, 320kB SRAM, and 128kB ROM. For a Zigbee coordinator or Thread border-router application, the 2MB flash holds the application image plus the protocol stack with room for OTA update staging; the 320kB SRAM leaves headroom for a 128-byte MTU buffer pool and a FreeRTOS heap. The 128kB ROM holds the bootloader and core RF calibration routines — no flash cycles consumed there.
Dual-protocol radio at 20dBm
The radio operates at 2.4GHz with O-QPSK modulation and supports Bluetooth v5.3 and Zigbee concurrently. Transmit power is 20dBm — enough to drive a 50-Ohm PCB trace antenna directly in most indoor mesh nodes without an external PA. Receive sensitivity is -106.5dBm for the 250kbps Zigbee O-QPSK signal, which gives roughly 126dB of link budget at 20dBm Tx — sufficient for a 100m line-of-sight link with a quarter-wave monopole.
Industrial temperature and supply rails
Supply voltage is 3.0V to 3.6V — a single 3.3V rail with a 100nF + 10µF decoupling pair per the reference design.
Serial interface count and GPIO availability
19 GPIOs are brought out on the 32-QFN package, multiplexed with SPI, I2C, I2S, UART, USB, JTAG, PCM, PWM, and IrDA. The USB serial interface is a dedicated peripheral — no external USB-UART bridge needed for programming or debug. The JTAG port shares two GPIOs with the SPI bus, so if both are used in a design, allocate pins carefully during the schematic phase.
No official second-source or direct pin-compatible alternative exists in the Espressif ESP32-H2 family; the ESP32-H2FH4 (4MB flash) is the same package and pinout but doubles the flash density.