Analog Devices MAX913CSA+ — Logic ICs
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Analog Devices / Logic ICs

Analog Devices MAX913CSA+ Comparator with Latch, 14ns

MPN MAX913CSA+
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Analog Devices MAX913CSA+ single comparator with latch, complementary TTL output, 14ns propagation delay, 110dB CMRR, 8-SOIC package, tube.

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[SPEC] Essential Parameters Snapshot Full Specifications (14)
Package / Case 8-SOIC (0.154", 3.90mm Width)
Supply Voltage 5V ~ 10V

Full Technical Specifications

14 Parameters
MAX913CSA+ specifications
Parameter / AttributeSpecification / Value
Typewith Latch
Output typeComplementary, TTL
MountingSurface Mount
Voltage - input offset2mV @ ±5V
Voltage - supply, single (Dual (±))5V ~ 10V
Output current20mA
Current - quiescent10mA
Current - input bias5µA @ ±5V
Operating temperature0°C ~ 70°C
PackageTube
Case8-SOIC (0.154\", 3.90mm Width)
CMRR, PSRR110dB CMRR, 100dB PSRR
Number of elements1
Propagation delay14ns
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Technical Details & Description

High-speed signal chain fit

The MAX913CSA+ is a single comparator with a built-in latch, distinguishing it from open-drain or single-ended comparators — the latch holds the output state after the strobe, which is useful in multiplexed or sampled-data systems where the comparator must capture a transient event and hold it for the downstream logic. Propagation delay is 14ns max, placing this part in the high-speed comparator class — at that speed, the comparator can resolve a 35 MHz input signal before the output state changes, but the board layout must keep the input trace short and the bypass capacitor within 2 mm of the supply pin to avoid ringing that eats into the timing margin. Common-mode rejection is 110 dB typical, and power-supply rejection is 100 dB typical — these figures mean the comparator rejects ground bounce and supply ripple well enough to resolve a 2 mV overdrive in a motor-drive or switching-regulator environment where the analog rails are noisy. Input offset voltage is 2 mV max at ±5 V — for a threshold detection circuit with a 10 mV reference, this offset contributes a 20% uncertainty at the trip point, so the design should account for it in the hysteresis band.

Supply rails and output drive

Single or dual supply from 5 V to 10 V — the part runs on a single 5 V rail in a 3.3 V system with a separate 5 V supply, or on ±5 V split rails for bipolar signal chains. The quiescent current is 10 mA max, which is typical for a high-speed comparator but means the part dissipates 50 mW on a 5 V rail — enough to feel warm in still air but within the SOIC thermal budget. Output type is complementary TTL — both inverting and non-inverting outputs are available, and the TTL levels are compatible with 5 V logic families directly. The output sinks or sources 20 mA typical, enough to drive a 74-series gate input or an LED indicator without a buffer transistor. Input bias current is 5 µA max at ±5 V — for a source impedance of 10 kΩ, this bias drops 50 mV across the source resistor, which is significant compared to the 2 mV offset. The source impedance should be kept below 1 kΩ to keep the bias-induced error under 5 mV.

Package and temperature grade

The supplier device package is 8-SOIC, so the ordering code and the package marking align. Not rated for automotive under-hood or outdoor industrial enclosures where ambient exceeds 70°C. For high-volume reflow, specify the tape-and-reel variant if one exists.

Lifecycle and compliance

ROHS3 compliant — the part meets the EU Restriction of Hazardous Substances directive including the four phthalates, which covers most global markets except where specific exemptions apply.

Frequently asked questions

What does the 'with latch' type mean for this comparator?

The latch holds the output state after the strobe signal goes low, so the comparator captures an input event and presents a stable logic level to the downstream circuit even if the input signal changes afterward. This is useful in multiplexed ADC front-ends or peak-detection circuits where the comparator must freeze the result for the sampling clock.

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