Eight channels of 16-bit precision with an internal reference
It integrates a 2.5 V internal reference (2 ppm/°C typical drift) and a buffered output capable of driving capacitive loads directly. The string-DAC architecture delivers monotonic performance with ±1.8 LSB INL and ±0.7 LSB DNL, which keeps the transfer curve clean across all codes. Settling time is 8 µs to ±1 LSB, so a full-scale step settles within one SPI frame at 10 MHz SCLK — fast enough for closed-loop setpoint updates in motor drives or programmable voltage sources.
At 125°C the reference output stays within ±0.05% accuracy typical, but verify against your system's total error budget.
The ROHS3 compliance is current for global shipping.
Package and footprint — 20-TSSOP with Tape & Reel
The device is supplied in a 20-lead TSSOP package (4.4 mm body width, 0.65 mm pitch).