16-bit monotonicity and the R-2R tradeoff
The AD5063BRMZ is a 16-bit voltage-output DAC from Analog Devices' nanoDAC® family, built on an R-2R ladder architecture. Its ±0.5 LSB INL and DNL guarantee monotonic behavior across all codes — no missing codes at 16 bits, which matters when the DAC drives a closed-loop actuator or sets a precision reference where a single-code glitch would cause a step change in the output. The unbuffered voltage output means the DAC's output impedance is the R-2R ladder resistance itself, typically 5-10 kΩ. If the load draws more than a few microamps, the voltage drops and linearity degrades. Plan on an external op-amp buffer unless the downstream stage is a high-impedance ADC input or a comparator.
Settling time and interface speed
Settling to ±0.5 LSB takes 4 µs typical — that sets the maximum update rate at roughly 250 kSPS for a full-scale step. For waveform generation or servo-loop setpoint updates, the SPI clock rate (up to 50 MHz on the nanoDAC family) is rarely the bottleneck; the settling time is. The digital interface is SPI- and DSP-compatible, with a daisy-chain feature that lets multiple AD5063s share a single chip-select line. The 24-bit shift register loads the 16-bit data plus control bits; the LDAC pin can update all DACs simultaneously after the shift register is loaded.
Supply rail simplicity and temperature range
That simplifies the power tree but means the reference input (external,) must stay within the supply rails. The output swing is 0 V to VREF, not rail-to-rail, because the output is unbuffered.
The tape-and-reel variant AD5063BRMZ-REEL7 is electrically identical — same die, same 10-MSOP package, same ±0.5 LSB INL/DNL and 4 µs settling. If your pick-and-place line runs reel-fed, the -REEL7 suffix is the one to order; the tube version (BRMZ) is fine for prototype or low-volume builds.